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Title: | The art of RT-Xen | Authors: | Liu, Fan | Keywords: | DRNTU::Engineering::Computer science and engineering::Hardware::Control structures and microprogramming | Issue Date: | 2015 | Abstract: | To achieve cost reduction in embedded systems, a single processor can be shared among multiple processes [1]. To ensure inter-processes interference is minimized, tasks of different applications need to be isolated. These tasks, which may have varying criticality level, will be hosted on different guest domains. Further, overrunning of a lower criticality tasks should not cause higher criticality tasks to miss its stringent deadline requirements. Current RT-Xen schedulers do not support the concept of scheduling tasks of multi-level criticality; hence development of Mixed Criticality Scheduler (MCS) is necessary. This report covers the research on architecture, fundamental concepts and implementation of MCS algorithm. The report is organized into the following topics: Background of RT-Xen hypervisor, analysis of different types of scheduler and priority schemes, setting up of related systems, overview of MCS, design and implementation of MCS, and possible future improvements. | URI: | http://hdl.handle.net/10356/63475 | Schools: | School of Computer Engineering | Research Centres: | Centre for High Performance Embedded Systems | Rights: | Nanyang Technological University | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
Appears in Collections: | SCSE Student Reports (FYP/IA/PA/PI) |
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File | Description | Size | Format | |
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FYP_Report_Amended.pdf Restricted Access | The Art of RT-Xen: Mixed Criticality Scheduler | 1.06 MB | Adobe PDF | View/Open |
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