Design of switching trigger circuit of SAR logic controller for Radix-3 system SAR ADC

Abstract

A switching trigger circuit of SAR logic controller for radix-3 system ADC is designed in order to complete a bigger project of designing SAR logic controller with ternary logic. Unlike conventional ternary inverter, which still needs to use resistor in its design, the proposed design of basic ternary inverter with multiple-threshold voltage configuration is implemented in this project in order to have a full-CMOS ternary inverter without any resistor. This report presents the transistor level design and simulation of the switching trigger circuit. UMC 65nm CMOS technology is used in this design. The finished ternary inverter then is used to design the main switching trigger circuit. The design is done following the logic requirements to generate a pulse that could trigger the activation of a ternary memory element. The VDD used as the only supply voltage in this project is 1.2V which is also the logic ‘2’. Logic ‘1’ equals to half of the VDD, which is 0.6V and logic ‘0’ is the ground voltage.