Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/65775
Title: Design of a full CMOS voltage reference
Authors: Wan, Xu
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Issue Date: 2015
Abstract: In integrated circuits, voltage reference is an essential part to provide precise and stable voltage as a supply for other sub-blocks in entire circuit. Compared with simple established resistor divider, the voltage reference has inherent constant voltage output which is independent of variation in supply voltage, load resistance, load current, temperature, or aging over time. In this project, the current mode approach with full CMOS band-gap voltage reference is designed using CSM 0.18 μm process and simulated in Cadence tool. Design of CMOS transistors in sub-threshold region allows this 720.294 mV typical voltage reference to operate with temperature coefficient of 35.3788 ppm/°C for the temperature range from -20°C to 80°C under 1-Volts power supply. Power supply rejection ratio (PSRR) is -28.6635 dB at 100Hz. The total current consumption is 746.12 nA. The circuit is extremely stable with 88.7398° phase margin and 41.0375 dB gain margin.
URI: http://hdl.handle.net/10356/65775
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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