Time-interleaved analog-to-digital converter mismatch compensation using infinite impulse response filters
Date of Issue2016
School of Electrical and Electronic Engineering
Nanyang Technological University
Time interleaving is an effective method to achieve a high sampling rate by using a bank of low sampling rate analog-to-digital converts (ADCs). The resulting structure is a time-interleaved ADC (TIADC). If the slow ADCs in the TIADC structure are identical and the clock signals driving them are perfectly aligned, the effective resolution of the TIADC will be the same as that of the sub-ADCs’. However, this is never the case in practice. Mismatches among different sub-ADC channels introduce unwanted distortion images in the output spectrum of the TIADC, leading to degraded system resolution. In this thesis, we first present an overview on the architecture of the TIADC. The effects of the mismatch errors to the TIADC output in both the time and frequency domains are derived. Existing methods for correcting the mismatch errors and reconstructing the TIADC output are surveyed. Among the various correction methods, post-processing the TIADC output data in the digital domain to interpolate the ideal samples has been drawing tremendous research attention recently. Traditionally, finite impulse response (FIR) filters were used in various reconstruction structures to compensate for the TIADC mismatch error. The advantages of using FIR filters are that the FIR filters are inherently stable and that the design techniques are readily available. In this work, we introduce an unprecedented design method which utilizes infinite impulse response (IIR) filters to compensate for the mismatch errors in the TIADC. The IIR mismatch compensation system may be interpreted as multichannel IIR filters with M input ports or an M-periodic time-varying (M-PTV) IIR filter, where M is the number of interleaving channels in the TIADC. We demonstrate the design principle of the IIR compensation filter and introduce a weighted least squares (WLS) optimization method to obtain the filter coefficients. The stability issue of the IIR compensation filter needs to be considered. By using the state space representation and vector processing, the IIR compensation filter is transformed into an equivalent multi-input multi-output (MIMO) system operating at one-Mth of the TIADC output rate. The IIR compensation filter is stable if all the eigenvalues of the state transition matrix of the MIMO system have magnitudes less than one. Incorporating the eigenvalue based stability criterion into the WLS optimization is difficult and would increase the design complexity. Therefore, two “computer aided” design approaches for gradually achieving a stable IIR filter design are introduced; one is by increasing the integer group delay and the other is by constraining the magnitudes of the feedback coefficients of the IIR filter. Explicit proof of the first method is presented. Moreover, the relationship between the minimum group delay required to achieve stability and various design parameters are investigated through numerous simulations. The derived expressions serve as useful guidelines for selecting a proper value of group delay in the design of the IIR compensation filter. By using simulation examples, we show that IIR filters with guaranteed stability for TIADC mismatch compensation can be designed and our IIR filters have much lower implementation complexity than the FIR counterparts when they are designed to achieve the same level of compensation performance. Specifically, for a given spurious frequency power, our IIR compensation filters yield about 30% saving in the total number of multiplier coefficients when compared to the FIR counterparts. The number of delay elements required and the number of arithmetic operations per sample in the case of the IIR compensation filters are also lower than those in the case of the FIR filters. Other important aspects such as the performance in the presence of identification error, filter redesign to cope with mismatch drifting, pipeline implementation etc. are also studied. Lastly, we discuss the finite wordlength effects in our IIR compensation filter including roundoff noise propagation, coefficient quantization and limit cycle.
DRNTU::Engineering::Electrical and electronic engineering