Emerging non-volatile memory based physical unclonable functions
Date of Issue2016
School of Electrical and Electronic Engineering
Cybersecurity has drawn tremendous attentions from academia and industry in the recent years, thanks to the proliferation of extensively connected devices and computers. While software-defined service has been demonstrated effective in many other applications, safeguarding sensitive information that virtually resides in the communication channels, computation nodes and data storage elements remains a critical issue that may require sagacious solution leveraging on the advantageous attributes of hardware. Hardware-based security solutions for accelerating cryptographic primitives like hash function and block cipher using hardware fabrics on FPGA and ASIC has been studied comprehensively in the literature. As an essential part, the storage element for preserving secret keys is alway the target of adversarial attacks. Unfortunately, conventional methods for key preservation such as applying a “One-Time-Programmable” Non-Volatile Memory (OTP NVM) storage where the key is restricted for read only by authorized identities, has been experimentally demonstrated vulnerable to varieties of physical attacks. The technology of Physical Unclonable Function (PUF) emerged at the right moment, when traditional approaches failed to circumvent this issue. Compared to the OTP NVM, PUF is superior in the security strength against physical attacks owing to its inherently tamper-evident property and physical randomness that renders predicting unknown secret patterns extracted from it a difficult job. The incentive of research in this dissertation is to improve the security and reliability of existing PUF implementations supported by applying emerging Non-Volatile-Memory (eNVM) technologies. Even though PUF is recognized as an efficient primitive for key preservation/generation and cryptographic protocols, it has been criticized for low reliability under certain environmental conditions and limited strength of security against intelligent attacks. The research in this dissertation will review these problems firstly, and propose several PUF designs using the eNVM media to achieve the best performance in security and reliability with minimum overhead. The first PUF design is featured by physically reconfiguration property, that is, the key pool of the PUF can be dynamically refreshed as required. Compared to an existing instance called “logically reconfigurable PUF”, the proposed design does not need any auxiliary components for algorithmically refreshing challenges and responses of a PUF. An illustrative design based on Phase Change Memory (PCM) by exploiting process variation and programming uncertainties of PCM cell devices have been used for demonstration. Statistics of measurement results on an experimental PCM chip proved the expected effectiveness of the proposed scheme. The second design utilizes the non-volatility of eNVM technologies for enhancing reliability of memory-based PUFs. The core idea of this approach is the Automatic Write-Back (AWB) technique which latches the initially generated response bits by comparing the mismatch between two memory cells into a complementary state. The worst-case reliability of response regeneration using AWB can be remarkably improved in the extreme working conditions. While the proposed AWB can be generously applied for most of eNVM technologies to implement PUFs, an illustrative design based on the Spin-Torque Transfer Magnetic Random-AccessMemory (STT-MRAM) was developed and simulated for demonstrating the efficacy. Simulation results on the experimentally calibrated device/circuit models proved that the reliability was increased by 106 times on average. Finally, the design of an eNVM-based PUF for dual-mode applications of normal memory operation and secret key generation is proposed. Unlike the conventionally intrinsic PUFs based on SRAM or latch, the proposed eNVM based dual-mode memory-based PUF is theoretically proven to be vulnerable against a “fault-injection attack” that makes use of data remanence after re-write operations to reveal the precedingly generated response bits. Meanwhile, a generically applicable design method considering the impact of process variations on memory yield and PUF quality is proposed. Optimal point of sizing memory cell can be found so as to achieve a memory design with minimized failure probabilities in read and write operations under the reliability constraint in the PUF mode. As a case study, an STT-MRAM based PUF instance is designed using the proposed method and simulated afterwards. The results indicate the advantage of the method for designing dual-mode memory based PUFs in terms of security enhancement and area/power consumption saving.
DRNTU::Engineering::Electrical and electronic engineering