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|Title:||Design of an 8-bit CMOS dynamic voltage reference analog-to-digital converter||Authors:||Zhang, Lian||Keywords:||DRNTU::Engineering||Issue Date:||2016||Abstract:||In this project, an 8-bit dynamic voltage reference analog-to-digital converter (ADC) is designed to encode a continuous-time analog input signal ranging from 0 to 1V into 8-bit discrete digital words, where ‘0’ is represented by 0V and ‘1’ is represented by 1.8V supply voltage level. The circuit design of this project is implemented in Cadence Virtuoso® Schematic Editor and simulated in Cadence Virtuoso® Analog Design Environment (ADE). In the ADC dynamic characterization part, MATLAB® is utilized to facilitate Fast Fourier Transform (FFT) analysis. The proposed 8-bit CMOS dynamic voltage reference based ADC consists of several sub-blocks such as voltage comparator, current steering digital-to-analog converter (DAC) and wide-swing constant transconductance bias with start-up. Validated by AMS 0.18 μm CMOS process, the proposed ADC can achieve an effective number of bits (ENOB) of 7.6168 bits with a sampling frequency of 2.5 MHz. The power consumption is 4.9842 mW under 1.8 V supply voltage. Compared with other reported 8-bit ADC counterparts, it shows a good Figure-of-Merit (FOM) of 10.157 pJ with other comparable performance.||URI:||http://hdl.handle.net/10356/67653||Rights:||Nanyang Technological University||Fulltext Permission:||restricted||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Student Reports (FYP/IA/PA/PI)|
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