Please use this identifier to cite or link to this item:
Title: Hardware development of three-phase high efficient multilevel converter with reduced clamping components
Authors: Mohamed Ismail
Keywords: DRNTU::Engineering
Issue Date: 2016
Abstract: Multilevel inverters are known to be very essential owing to its vast number of utilizations. There are a variety of fields in which they are being used. Multilevel inverters have taken a common place in many applications and products. They are attractive because they allow for a high number of voltage outputs to be synthesized. This grants a good efficiency of power conversion. There are different types of topologies which can be used in the design of inverters. The cost of the inverter varies according to topologies as different topologies use different components. As the number of levels increase in an inverter, the cost will increase as the number of components increases. This report will focus on reducing the cost of a three-phase multilevel converter by combining different topologies to reduce clamping components. The inverter uses a combination of Neutral-Point Clamped and Flying Capacitor topologies to achieve the reduction in cost while achieving good performances. The hardware prototype of the hybrid inverter is developed and then tested for its efficiency. The supplementary level shifter circuits, analogue circuits and gate driver circuits are also developed to power the multilevel inverter.
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

Files in This Item:
File Description SizeFormat 
Mohamed Ismail FYP Final Report.pdf
  Restricted Access
5.61 MBAdobe PDFView/Open

Google ScholarTM


Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.