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Title: Hardware implementation of cascaded H-bridge inverters
Authors: Perna, Bhugra
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Power electronics
Issue Date: 2016
Abstract: Medium Voltage (MV) converters have lately been quite popular for high power motor drives. Variable speed control of the motor and the drop in the energy loss i.e. increase in efficiency of the system are the main advantages of these drives. These MV converters are widely used in industries for fans, driving pumps, and marine propulsion system of ships. The advent of the medium voltage and high power application has made the study of multilevel converters for medium voltage drives application as the area of interest. Multilevel Converters have lower harmonics than a typical 2 level converters for a given switching frequency and has very less Total Harmonic distortions in the input current. In addition to this, the use of IGBTs in Multilevel converters helps in reduction of the system loss thereby increasing the efficiency. Also the use of IGBT helps in increase system power density. In this study MV converter of 6.6kV has been considered. The study has been done for both R load and then RL load. The purpose of this thesis is have an overview of the working of Cascaded H-Bridge inverter, develop the 11 Level H-Bridge inverter using MATLAB, and finally implement the learning on building a 5-Level CHB inverter, by cascading two hardware power modules in series and using dSPACE as an interface between simulation and hardware, and observing the waveforms and harmonic analysis across load. The model of cascaded H-Bridge inverter was built in MATLAB 2014B Simulink Software and dSPACE used is rti1103.
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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