Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/70693
Title: Design of a CMOS class AB op amp
Authors: Song, Xinze
Keywords: DRNTU::Engineering::Electrical and electronic engineering
Issue Date: 2017
Abstract: Power consumption is always the main concern for every manufacturing factory, and power amplifier is one of the most important structures in circuit design. For designers, building compact and portable devices with low power consumption is the basic requirement. Since the operational transconductance amplifiers (OTA) can only drive capacitance load, a power amplifier is then needed to be the output stage to load resistors. A CMOS Class AB operational amplifier is the best option to meet the low power consumption and high-efficiency requirements. As a beginner with very basic knowledge in circuit design, this project not only presents the whole design procedure of a class AB op-amp but also the tips for beginners, such as how to reduce the offset of the whole circuit. The designed circuit use a wide swing constant transconductance biasing structure to drive each transistor in the saturation region. The main part is composed of a folded cascode amplifier and a push-pull class AB output stage. The class AB output stage is also biased using two floating current sources. The designed circuit provides 77dB open loop gain with a phase margin of 108 degrees. The total harmonic distortion is minimized and the quiescent current is less than 10% of the maximum output drive. The PSRR of the designed circuit is up to 118 dB Cadence Custom IC Design Tools (Virtuoso Front to Back Design Environment, version 5.10.41.500.4.67) based on 0.18μm CSM CMOS N-well process is the design tool required to complete the project.
URI: http://hdl.handle.net/10356/70693
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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