Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/71007
Title: Low power logic-in-memory circuit design
Authors: Teo, Darren
Keywords: DRNTU::Engineering::Electrical and electronic engineering
Issue Date: 2017
Abstract: Nonvolatile memory (NVM) is a type of computer memory that can retain its previously stored information even if power supply is completely shut off. With existing technology in the CMOS-based very-large-scale integration (VLSI), several challenges has been encountered. As the number of transistors required in VLSI is increasing throughout the year, issue such as communications bottleneck between memory and logic modules as well as the increasing standby power dissipation has come into concerned. With the introduction of MTJ-Based Nonvolatile Logic-in-Memory Circuit MTJ, logic and memory storage elements are integrated into a logic-circuit plane in this circuit. Data are permanently stored in MTJ devices even if power is cut off. This result in lesser static power used to store data into memory. It was also tabulated that there was a 23% reduction in dynamic power dissipation compared to conventional CMOS circuit as the number of current paths from Vdd to GND has been reduce in this circuit design. It also helps reduces the chip area as lesser number of devices were used.
URI: http://hdl.handle.net/10356/71007
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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