Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/71007
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dc.contributor.authorTeo, Darren
dc.date.accessioned2017-05-12T07:22:54Z
dc.date.available2017-05-12T07:22:54Z
dc.date.issued2017
dc.identifier.urihttp://hdl.handle.net/10356/71007
dc.description.abstractNonvolatile memory (NVM) is a type of computer memory that can retain its previously stored information even if power supply is completely shut off. With existing technology in the CMOS-based very-large-scale integration (VLSI), several challenges has been encountered. As the number of transistors required in VLSI is increasing throughout the year, issue such as communications bottleneck between memory and logic modules as well as the increasing standby power dissipation has come into concerned. With the introduction of MTJ-Based Nonvolatile Logic-in-Memory Circuit MTJ, logic and memory storage elements are integrated into a logic-circuit plane in this circuit. Data are permanently stored in MTJ devices even if power is cut off. This result in lesser static power used to store data into memory. It was also tabulated that there was a 23% reduction in dynamic power dissipation compared to conventional CMOS circuit as the number of current paths from Vdd to GND has been reduce in this circuit design. It also helps reduces the chip area as lesser number of devices were used.en_US
dc.format.extent33 p.en_US
dc.language.isoenen_US
dc.rightsNanyang Technological University
dc.subjectDRNTU::Engineering::Electrical and electronic engineeringen_US
dc.titleLow power logic-in-memory circuit designen_US
dc.typeFinal Year Project (FYP)en_US
dc.contributor.supervisorKim Tae Hyoungen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.description.degreeBachelor of Engineeringen_US
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Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)
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