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Title: Implementation of a closed-loop-system to reduce tapeout cycle time
Authors: Viswanathan Surya
Keywords: DRNTU::Engineering::Electrical and electronic engineering
Issue Date: 2018
Abstract: Semiconductor industry is an environment where productivity and reliability has to be continuously improved to comply with the rule of Moore’s law and to meet the anticipated technological changes in lithography techniques. Tapeout cycle time reduction plays an important role in increasing the productivity of semiconductor manufacturing. In this thesis, a feedback control has been established between the fab manufacturing process and the design tapeout process which can help to reduce the tapeout cycle time thereby increasing productivity. Reliability is improved by providing a feedback mechanism to the design through a parameter called RATING. The existing open loop system to feed forward design data to Fab has been complemented with a feedback system developed in the form of a visual aid to enable tapeout cycle time reduction. A statistical analysis on the cycle time involved with and without the feedback from the control system is carried out and the percentage of disposition cycle time reduced is found. Automation has been enabled to allow users to provide rating that can be used as an indicator for improving the design quality. In future, depending on the rating given to design breaches, automation can be setup to indicate the designer the need for the design changes or to the fab for the changes in the manufacturing process.
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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