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|Title:||Innovative application and driving of enhancement mode gallium nitride power transistors||Authors:||Cai, Aaron Qingwei||Keywords:||DRNTU::Engineering::Electrical and electronic engineering::Power electronics||Issue Date:||2018||Source:||Cai, A. Q. (2018). Innovative application and driving of enhancement mode gallium nitride power transistors. Doctoral thesis, Nanyang Technological University, Singapore.||Abstract:||Wide-bandgap semiconductors like Gallium Nitride (GaN) are enabling higher efficiency and greater power density in power electronics. The objective of this work is to develop novel gate drive methods and applications for the proliferation of Enhancement mode (E-mode) GaN power transistors. The challenges of driving enhancement mode GaN devices are identified. Gate drive study is conducted to review the advantages and limitations of various gate drive methods. A 2-stage gate drive is introduced to allow a capacitor-less type gate drive to meet the requirements of the GaN GIT. This is further improved by proposing a 2-stage, 2-phase gate driver to reduce the gate ringing. Simulation is conducted to verify the design and the proposed design demonstrates reduction in gate ringing. A GaN GIT gate driver IC is evaluated against the R-type and RC-type gate driver to demonstrate driving the GaN Gate Injection Transistor (GIT) at high slew rates (~150 V/ns) while having built-in active Miller clamp and self-generated negative voltage rail for cross-conduction protection. This research investigated the application of GaN GIT in Inductive Power Transfer (IPT) for Electric Vehicles (EV). IPT systems provide significant benefits over conventional plug-in chargers. A high frequency inverter using GaN GIT, which have low on-resistance and gate charge, is implemented to reduce switching and conduction loss. The switching characteristics of the GaN GIT are studied and the inverter is designed to ensure low switching losses, while keeping overshoot and slew rates under control. An efficiency centric mode of operation is proposed to improve the efficiency of the system, while ensuring sufficient power transfer. The system efficiency peaks at 95 % at 100 kHz operation and 92 % at 250 kHz operation for a coil gap of 80 mm at 2 kW output power. At a coil gap of 150 mm, the system obtains above 90 % efficiency at 1.3 kW. The inductive power transfer system is compared to a similar system using SiC power transistors and outperforms it by 1 % at 2 kW. This work identified Point of Load (POL) converters in data centers as another potential application for enhancement mode GaN due to the increasing need for high efficiency and power density. An efficiency study on the buck converter for large step down applications from 48 V to 1 V is conducted and limitations to this topology are identified. In order to further reduce the solution size and reduce effects of parasitic inductance, a novel 3-dimensional mounting strategy is proposed to integrate the GaN device with the Si gate driver.||URI:||http://hdl.handle.net/10356/73923||DOI:||10.32657/10356/73923||Fulltext Permission:||open||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Theses|
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