Advanced flip chip and wafer level packages for 2.5D and 3D IC package technology

Abstract

The demand of electronic product explodes in recent years, and the trend of electronic product is portable, multifunctional and budget currently. The fan-out wafer level packaging technology is a kind of wafer level packaging technology, and it becomes more and more attractive and popular because of its flexibility to integrate diverse devices in a very small form factor. The fan-out wafer level packaging technology has the advantages of high density of input/output, minimal package size and low cost. The fan-out wafer level package (FOWLP) is usually used to volume sensitive devices such as mobile phones and wearables. However, the strength of ultrathin FOWLP is low, and the low package strength often leads to crack issues. Therefore, the study of strength behavior of FOWLP is essential. FOWLP is made up of various materials and thus the proper structure design and material selection are important to meet the reliability requirement. The FOWLP strength is evaluated by the experimental method and numerical method. We confirm three significant characteristics of FOWLP strength from the experimental work. The wafer grinding process, FOWLP dimension and thermal factor affect the FOWLP strength significantly. The numerical work proves that the flexure strength of over-molded structure FOWLP is higher than the flexure strength of other structure FOWLPs with the same package thickness. Two theoretical models of FOWLP strength are proposed. These two models are based on the location of FOWLP initial fracture point. The comparison of FOWLP strength model with experiment results and simulation results shows that they are identical. A new theoretical model of FOWLP fatigue crack growth is proposed. This model additionally considers the effect of thermal factor on the FOWLP fatigue crack growth.