Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/77021
Title: Educational simulator for analysing pipelined RISC architecture
Authors: Lim, Di Xiang
Keywords: DRNTU::Engineering::Computer science and engineering
Issue Date: 2019
Abstract: This paper presents the implementation of a pipelined MIPS simulator for educational purpose. The MIPS simulator is built on top of an existing MIPS simulator ‘MARS’. MARS is a free online MIPS simulator that allow other programmers to add on new features to it through the Plug-in feature that is employ by the creators. However, MARS latest version currently supports single cycle instruction execution only, therefore we will be introducing a new Plug-in that will enable MARS to execute instruction in a Pipelined manner. Features that are applicable to a Pipelined Simulator such as Data Forwarding, and Early Branch Evaluation are also be included in the implementation.
URI: http://hdl.handle.net/10356/77021
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:SCSE Student Reports (FYP/IA/PA/PI)

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