Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/77455
Title: Semiconductor intellectual property (IP) optimization for design for manufacturability
Authors: Lua, Boon Hong
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Issue Date: 2019
Abstract: GLOBALFOUNDRIES is full-service semiconductor foundries that offer technology footprint and a truly global manufacturing. By collaboration and innovation it is realizing the vision of reshaping the semiconductor industry. GLOBALFOUNDRIES offers superior manufacturing, a unique combination of advanced technology and global operations. Lithography is one of the key modules in the wafer fabrication process, and OPC (optical proximity correction) is an inevitable step before lithography. Design for manufacturing (DFM) refers to the actions taken during the physical design phase of IC development to ensure accurate manufacturing of the design. Most of the defects in the IC manufacturing process are due to over-processing steps during the lithographic printing steps or random particles interrupting the flow of light through the layout mask. The diffraction effect becomes significant when the light is interacting with the object and the slit approaches the dimensions of the light wavelength. Semiconductor manufacturing has far exceeded this threshold. High-resolution enhancement techniques such as optical proximity correction (OPC) were able to resolve distortions caused by diffraction effects. However, OPC generated by system calculated may cause defect in manufacturing process. So, OPC optimization for manufacture process is necessary to minimize the defect concern.
URI: http://hdl.handle.net/10356/77455
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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