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Title: Simulation and analysis of faults in high voltage DC (HVDC) power transmission
Authors: Karthikeyan, Manickam
Yeap, Yew Ming
Ukil, Abishek
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Industrial electronics
Issue Date: 2014
Source: Karthikeyan, M., Yeap, Y. M., & Ukil, A. (2014). Simulation and analysis of faults in high voltage DC (HVDC) power transmission. In Proceedings of the 40th Annual Conference of the IEEE Industrial Electronics Society 2014 (pp.1786-1791). Dallas: IEEE Industrial Electronics Society.
Conference: Annual Conference of the IEEE Industrial Electronics Society (40th : 2014 : Dallas)
Abstract: Modern civilization depends heavily on the consumption of electrical energy for industrial, commercial, agricultural, domestic and social purposes. However, for the current HVDC system, proper protection devices and logic are not yet as mature as the AC counterpart. This paper presents the fault analysis for the protection of the HVDC (65-765 kV range) grid, using PSCAD. Faults in the DC transmission line are analyzed. This paper also looks into the response of the system to each kind of faults. It is observed that the AC and DC faults have different signatures allowing us to tell them apart. The rise time of the fault current is presented here. Analysis of load changes is also done comparatively with the fault cases.
Schools: School of Electrical and Electronic Engineering 
Rights: © 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [].
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Conference Papers

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