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Title: A low voltage low power highly linear CMOS quadrature mixer using transconductance cancellation technique
Authors: Yeo, Kiat Seng
Wang, Keping
Ma, Kaixue
Ye, Wanxin
Zhang, Hao
Wang, Zhigong
Keywords: DRNTU::Engineering::Electrical and electronic engineering
Issue Date: 2012
Source: Wang, K., Ma, K., Ye, W., Yeo, K. S., Zhang, H., & Wang, Z. (2012). A low voltage low power highly linear CMOS quadrature mixer using transconductance cancellation technique. In 2012 IEEE MTT-S International Microwave Symposium Digest, pp.1-3.
Abstract: This paper presents a low voltage low power high linearity quadrature mixer for software defined radio applications in a 90nm CMOS technology. A 7-dB improvement of input-referred 3rd-order intermodulation point (IIP3) is achieved by using a differential gm″ (the second derivation of transconductance) canceling technology. The negative value of gm″ in saturated pseudo differential transistor (PDT) is compensated by the positive value of PDT in subthreshold region. The even-order distortion is eliminated by differential PDTs. The mixer consumes a dc power of only 3.8mW under 1V supply. The conversion gain with 10 samples is 3.6∼7.2 dB in the frequency range of 0.3∼6 GHz. the IIP3 is 7.9∼12.3 dBm 0.3∼6 GHz, whereas the single-sideband noise figure (SSB NF) is 11.1∼14.7 dB.
DOI: 10.1109/MWSYM.2012.6258257
Rights: © 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [DOI:].
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Conference Papers

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