Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/81188
Title: Heterogeneous dataflow architectures for FPGA-based sparse LU factorization
Authors: Siddhartha
Kapre, Nachiket
Keywords: Computer Science and Engineering
Issue Date: 2014
Source: Siddhartha., & Kapre, N. (2014). Heterogeneous dataflow architectures for FPGA-based sparse LU factorization. 2014 24th International Conference on Field Programmable Logic and Applications (FPL), 1-4.
Abstract: FPGA-based token dataflow architectures with heterogeneous computation and communication subsystems can accelerate hard-to-parallelize, irregular computations in sparse LU factorization. We combine software pre-processing and architecture customization to fully expose and exploit the underlying heterogeneity in the factorization algorithm. We perform a one-time pre-processing of the sparse matrices in software to generate dataflow graphs that capture raw parallelism in the computation through substitution and reassociation transformations. We customize the dataflow architecture by picking the right mixture of addition and multiplication processing elements to match the observed balance in the dataflow graphs. Additionally, we modify the network-on-chip to route certain critical dependencies on a separate, faster communication channel while relegating less-critical traffic to the existing channels. Using our techniques, we show how to achieve speedups of up to 37% over existing state-of-the-art FPGA-based sparse LU factorization systems that can already run 3-4× faster than CPU-based sparse LU solvers using the same hardware constraints.
URI: https://hdl.handle.net/10356/81188
http://hdl.handle.net/10220/39175
DOI: 10.1109/FPL.2014.6927401
Rights: © 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/FPL.2014.6927401].
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:SCSE Conference Papers

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