Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/81218
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dc.contributor.authorSoh, Jun Jieen
dc.contributor.authorKapre, Nachiketen
dc.date.accessioned2015-12-17T06:21:38Zen
dc.date.accessioned2019-12-06T14:25:48Z-
dc.date.available2015-12-17T06:21:38Zen
dc.date.available2019-12-06T14:25:48Z-
dc.date.issued2014en
dc.identifier.citationSoh, J. J., & Kapre, N. (2014). Comparing soft and hard vector processing in FPGA-based embedded systems. 2014 24th International Conference on Field Programmable Logic and Applications (FPL).en
dc.identifier.urihttps://hdl.handle.net/10356/81218-
dc.description.abstractSoft vector processors can augment and extend the capability of embedded hard vector processors in FPGA-based SoCs such as the Xilinx Zynq. We develop a compiler framework and an auto-tuning runtime that optimizes and executes data-parallel computation either on the scalar ARM processor, the embedded NEON engine or the Vectorblox MXP soft vector processor as appropriate. We consider computational conditions such as precision, vector length, chunk size, IO requirements under which soft vector processing can outperform scalar cores and hard vector blocks. Across a range of data-parallel benchmarks, we show that the MXP soft vector processor can outperform the NEON engine by up to 3.95× while saving 9% dynamic power (0.1W absolute). Our compilation and runtime framework is also able to outperform the gcc NEON vectorizer under certain conditions by explicit generation of NEON intrinsics and performance tuning of the auto-generated data-parallel code.en
dc.format.extent7 p.en
dc.language.isoenen
dc.rights© 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/FPL.2014.6927467].en
dc.subjectComputer Science and Engineeringen
dc.titleComparing soft and hard vector processing in FPGA-based embedded systemsen
dc.typeConference Paperen
dc.contributor.schoolSchool of Computer Engineeringen
dc.contributor.conference2014 24th International Conference on Field Programmable Logic and Applications (FPL)en
dc.identifier.doi10.1109/FPL.2014.6927467en
dc.description.versionAccepted versionen
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