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Title: A 100-Channel 1-mW Implantable Neural Recording IC
Authors: Zou, Xiaodan
Liu, Lei
Cheong, Jia Hao
Yao, Lei
Li, Peng
Cheng, Ming-Yuan
Goh, Wang Ling
Rajkumar, Ramamoorthy
Dawe, Gavin Stewart
Cheng, Kuang-Wei
Je, Minkyu
Keywords: Capacitor-less LDO
High power efficiency
Multi-channel neural recording system
Power and area trade-off
Dual S/H
Current reuse
Biomedical application
Low-noise neural amplifier
Issue Date: 2013
Source: Zou, X., Liu, L., Cheong, J. H., Yao, L., Li, P., Cheng, M.-Y., et al. (2013). A 100-Channel 1-mW Implantable Neural Recording IC. IEEE Transactions on Circuits and Systems I: Regular Papers, 60(10), 2584-2596.
Series/Report no.: IEEE Transactions on Circuits and Systems I: Regular Papers
Abstract: This paper presents a fully implantable 100-channel neural interface IC for neural activity monitoring. It contains 100-channel analog recording front-ends, 10 multiplexing successive approximation register ADCs, digital control modules and power management circuits. A dual sample-and-hold architecture is proposed, which extends the sampling time of the ADC and reduces the average power per channel by more than 50% compared to the conventional multiplexing neural recording system. A neural amplifier (NA) with current-reuse technique and weak inversion operation is demonstrated, consuming 800 nA under 1-V supply while achieving an input-referred noise of 4.0 μVrms in a 8-kHz bandwidth and a NEF of 1.9 for the whole analog recording chain. The measured frequency response of the analog front-end has a high-pass cutoff frequency from sub-1 Hz to 248 Hz and a low-pass cutoff frequency from 432 Hz to 5.1 kHz, which can be configured to record neural spikes and local field potentials simultaneously or separately. The whole system was fabricated in a 0.18-μm standard CMOS process and operates under 1 V for analog blocks and ADC, and 1.8 V for digital modules. The number of active recording channels is programmable and the digital output data rate changes accordingly, leading to high system power efficiency. The overall 100-channel interface IC consumes 1.16-mW total power, making it the optimum solution for multi-channel neural recording systems.
ISSN: 1549-8328
DOI: 10.1109/TCSI.2013.2249175
Schools: School of Electrical and Electronic Engineering 
School of Physical and Mathematical Sciences 
Rights: © 2013 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [doi:].
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Journal Articles
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