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dc.contributor.authorZou, Xiaodanen
dc.contributor.authorLiu, Leien
dc.contributor.authorCheong, Jia Haoen
dc.contributor.authorYao, Leien
dc.contributor.authorLi, Pengen
dc.contributor.authorCheng, Ming-Yuanen
dc.contributor.authorGoh, Wang Lingen
dc.contributor.authorRajkumar, Ramamoorthyen
dc.contributor.authorDawe, Gavin Stewarten
dc.contributor.authorCheng, Kuang-Weien
dc.contributor.authorJe, Minkyuen
dc.identifier.citationZou, X., Liu, L., Cheong, J. H., Yao, L., Li, P., Cheng, M.-Y., et al. (2013). A 100-Channel 1-mW Implantable Neural Recording IC. IEEE Transactions on Circuits and Systems I: Regular Papers, 60(10), 2584-2596.en
dc.description.abstractThis paper presents a fully implantable 100-channel neural interface IC for neural activity monitoring. It contains 100-channel analog recording front-ends, 10 multiplexing successive approximation register ADCs, digital control modules and power management circuits. A dual sample-and-hold architecture is proposed, which extends the sampling time of the ADC and reduces the average power per channel by more than 50% compared to the conventional multiplexing neural recording system. A neural amplifier (NA) with current-reuse technique and weak inversion operation is demonstrated, consuming 800 nA under 1-V supply while achieving an input-referred noise of 4.0 μVrms in a 8-kHz bandwidth and a NEF of 1.9 for the whole analog recording chain. The measured frequency response of the analog front-end has a high-pass cutoff frequency from sub-1 Hz to 248 Hz and a low-pass cutoff frequency from 432 Hz to 5.1 kHz, which can be configured to record neural spikes and local field potentials simultaneously or separately. The whole system was fabricated in a 0.18-μm standard CMOS process and operates under 1 V for analog blocks and ADC, and 1.8 V for digital modules. The number of active recording channels is programmable and the digital output data rate changes accordingly, leading to high system power efficiency. The overall 100-channel interface IC consumes 1.16-mW total power, making it the optimum solution for multi-channel neural recording systems.en
dc.description.sponsorshipASTAR (Agency for Sci., Tech. and Research, S’pore)en
dc.format.extent14 p.en
dc.relation.ispartofseriesIEEE Transactions on Circuits and Systems I: Regular Papersen
dc.rights© 2013 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [doi:].en
dc.subjectCapacitor-less LDOen
dc.subjectHigh power efficiencyen
dc.subjectMulti-channel neural recording systemen
dc.subjectPower and area trade-offen
dc.subjectDual S/Hen
dc.subjectCurrent reuseen
dc.subjectSAR ADCen
dc.subjectBiomedical applicationen
dc.subjectLow-noise neural amplifieren
dc.titleA 100-Channel 1-mW Implantable Neural Recording ICen
dc.typeJournal Articleen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen
dc.contributor.schoolSchool of Physical and Mathematical Sciencesen
dc.description.versionAccepted versionen
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