Please use this identifier to cite or link to this item:
https://hdl.handle.net/10356/82889
Title: | Integration of GaAs, GaN, and Si-CMOS on a common 200 mm Si substrate through multilayer transfer process | Authors: | Lee, Kwang Hong Bao, Shuyu Zhang, Li Kohen, David Fitzgerald, Eugene Tan, Chuan Seng |
Keywords: | CMOS integrated circuits Gallium arsenide |
Issue Date: | 2016 | Source: | Lee, K. H., Bao, S., Zhang, L., Kohen, D., Fitzgerald, E., & Tan, C. S. (2016). Integration of GaAs, GaN, and Si-CMOS on a common 200 mm Si substrate through multilayer transfer process. Applied Physics Express, 9(8), 086501-. | Series/Report no.: | Applied Physics Express | Abstract: | The integration of III–V semiconductors (e.g., GaAs and GaN) and silicon-on-insulator (SOI)-CMOS on a 200 mm Si substrate is demonstrated. The SOI-CMOS donor wafer is temporarily bonded on a Si handle wafer and thinned down. A second GaAs/Ge/Si substrate is then bonded to the SOI-CMOS-containing handle wafer. After that, the Si from the GaAs/Ge/Si substrate is removed. The GaN/Si substrate is then bonded to the SOI–GaAs/Ge-containing handle wafer. Finally, the handle wafer is released to realize the SOI–GaAs/Ge/GaN/Si hybrid structure on a Si substrate. By this method, the functionalities of the materials used can be combined on a single Si platform. | URI: | https://hdl.handle.net/10356/82889 http://hdl.handle.net/10220/42320 |
ISSN: | 1882-0778 | DOI: | 10.7567/APEX.9.086501 | Schools: | School of Electrical and Electronic Engineering | Rights: | © 2016 The Japan Society of Applied Physics. This is the author created version of a work that has been peer reviewed and accepted for publication by Applied Physics Express, The Japan Society of Applied Physics. It incorporates referee’s comments but changes resulting from the publishing process, such as copyediting, structural formatting, may not be reflected in this document. The published version is available at: [http://dx.doi.org/10.7567/APEX.9.086501]. | Fulltext Permission: | open | Fulltext Availability: | With Fulltext |
Appears in Collections: | EEE Journal Articles |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
Integration of GaAs, GaN and Si-CMOS on a common 200.pdf | 560.17 kB | Adobe PDF | View/Open |
SCOPUSTM
Citations
10
40
Updated on Mar 22, 2024
Web of ScienceTM
Citations
10
37
Updated on Oct 28, 2023
Page view(s) 50
500
Updated on Mar 29, 2024
Download(s) 20
290
Updated on Mar 29, 2024
Google ScholarTM
Check
Altmetric
Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.