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|Title:||Distributed In-Memory Computing on Binary Memristor-Crossbar for Machine Learning||Authors:||Yu, Hao
|Issue Date:||2017||Publisher:||Springer||Source:||Yu, H., Ni, L., & Huang, H. (2017). Distributed In-Memory Computing on Binary Memristor-Crossbar for Machine Learning. In S. Vaidyanathan & C. Volos (Eds.), Advances in Memristors, Memristive Devices and Systems (pp.275-304). Cham, Switzerland: Springer International Publishing.||Abstract:||The recent emerging memristor can provide non-volatile memory storage but also intrinsic computing for matrix-vector multiplication, which is ideal for low-power and high-throughput data analytics accelerator performed in memory. However, the existing memristor-crossbar based computing is mainly assumed as a multi-level analog computing, whose result is sensitive to process non-uniformity as well as additional overhead from AD-conversion and I/O. In this chapter, we explore the matrix-vector multiplication accelerator on a binary memristor-crossbar with adaptive 1-bit-comparator based parallel conversion. Moreover, a distributed in-memory computing architecture is also developed with according control protocol. Both memory array and logic accelerator are implemented on the binary memristor-crossbar, where logic-memory pair can be distributed with protocol of control bus. Experiment results have shown that compared to the analog memristor-crossbar, the proposed binary memristor-crossbar can achieve significant area-saving with better calculation accuracy. Moreover, significant speedup can be achieved for matrix-vector multiplication in the neuron-network based machine learning such that the overall training and testing time can be both reduced respectively. In addition, large energy saving can be also achieved when compared to the traditional CMOS-based out-of-memory computing architecture.||URI:||https://hdl.handle.net/10356/86062
|ISBN:||978-3-319-51723-0||DOI:||10.1007/978-3-319-51724-7_12||Rights:||© 2017 Springer International Publishing. This is the author created version of a work that has been peer reviewed and accepted for publication by Advances in Memristors, Memristive Devices and Systems, Springer International Publishing. It incorporates referee’s comments but changes resulting from the publishing process, such as copyediting, structural formatting, may not be reflected in this document. The published version is available at: [http://dx.doi.org/10.1007/978-3-319-51724-7_12].||Fulltext Permission:||open||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Books & Book Chapters|
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