Please use this identifier to cite or link to this item:
Title: Improving main memory hash joins on Intel Xeon Phi processors
Authors: Jha, Saurabh
He, Bingsheng
Lu, Mian
Cheng, Xuntao
Huynh, Huynh Phung
Keywords: DRNTU::Engineering::Computer science and engineering
Many Integrated Core
Xeon Phi
Issue Date: 2015
Source: Jha, S., He, B., Lu, M., Cheng, X., & Huynh, H. P. (2015). Improving main memory hash joins on Intel Xeon Phi processors. Proceedings of the VLDB Endowment, 8(6), 642-653. doi:10.14778/2735703.2735704
Series/Report no.: Proceedings of the VLDB Endowment
Abstract: Modern processor technologies have driven new designs and implementations in main-memory hash joins. Recently, Intel Many Integrated Core (MIC) co-processors (commonly known as Xeon Phi) embrace emerging x86 single-chip many-core techniques. Compared with contemporary multi-core CPUs, Xeon Phi has quite different architectural features: wider SIMD instructions, many cores and hardware contexts, as well as lower-frequency in-order cores. In this paper, we experimentally revisit the state-of-the-art hash join algorithms on Xeon Phi co-processors. In particular, we study two camps of hash join algorithms: hardware-conscious ones that advocate careful tailoring of the join algorithms to underlying hardware architectures and hardware-oblivious ones that omit such careful tailoring. For each camp, we study the impact of architectural features and software optimizations on Xeon Phi in comparison with results on multi-core CPUs. Our experiments show two major findings on Xeon Phi, which are quantitatively different from those on multi-core CPUs. First, the impact of architectural features and software optimizations has quite different behavior on Xeon Phi in comparison with those on the CPU, which calls for new optimization and tuning on Xeon Phi. Second, hardware oblivious algorithms can outperform hardware conscious algorithms on a wide parameter window. These two findings further shed light on the design and implementation of query processing on new-generation single-chip many-core technologies.
ISSN: 2150-8097
DOI: 10.14778/2735703.2735704
Rights: © 2015 The VLDB Endowment. This work is licensed under the Creative Commons AttributionNonCommercial-NoDerivs 3.0 Unported License. To view a copy of this license, visit Obtain permission prior to any use beyond those covered by the license. Contact copyright holder by emailing Articles from this volume were invited to present their results at the 41st International Conference on Very Large Data Bases, August 31st - September 4th 2015, Kohala Coast, Hawaii.
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:SCSE Journal Articles

Files in This Item:
File Description SizeFormat 
Improving main memory hash joins on Intel Xeon Phi processors an experimental approach.pdf772.63 kBAdobe PDFThumbnail

Google ScholarTM



Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.