Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/88765
Title: Attacks in Reality: The Limits of Concurrent Error Detection Codes against Laser Fault Injection
Authors: Breier, Jakub
He, Wei
Jap, Dirmanto
Bhasin, Shivam
Chattopadhyay, Anupam
Keywords: Cryptography
Hardware Security
Issue Date: 2017
Source: Breier, J., He, W., Jap, D., Bhasin, S., & Chattopadhyay, A. (2017). Attacks in Reality: The Limits of Concurrent Error Detection Codes against Laser Fault Injection. Journal of Hardware and Systems Security, 1(4), 298-310.
Series/Report no.: Journal of Hardware and Systems Security
Abstract: As a prominent attack approach against the security modules of integrated circuits, fault injection attacks (FIA) are able to breach thecryptographic primitives by analyzing the intentionally induced computation errors by adversaries. Parity-based Concurrent Error Detection (CED) techniques are often deployed as a countermeasure, owing to their low-overhead. Advanced linear and non-linear randomized encodings can be employed for constructing varying CED schemes. In this paper, we first evaluate the detection capability of linear parity-protected ciphers implemented in commercial FPGA, using laser fault injection (LFI) technique. A single-bit linear parity scheme is shown to be ineffective for error detection, since the LFI can typically flip multiple bits that are close to each other. On the other hand, a linear randomized parity scheme, with multiple bits parity, shows higher detection rates. Further, we study existing (randomized) non-linear encoding-based CED. With practical fault distributions on PRESENT cipher, non-linear randomized codes are extensively tested against fault injection. Although, known to have better theoretical detection bounds, non-linear encodings do not provide much improvements over simple randomized linear codes.
URI: https://hdl.handle.net/10356/88765
http://hdl.handle.net/10220/44736
ISSN: 2509-3428
DOI: 10.1007/s41635-017-0020-3
Rights: © 2017 Springer International Publishing AG. This is the author created version of a work that has been peer reviewed and accepted for publication by Journal of Hardware and Systems Security, Springer International Publishing AG. It incorporates referee’s comments but changes resulting from the publishing process, such as copyediting, structural formatting, may not be reflected in this document. The published version is available at: [http://dx.doi.org/10.1007/s41635-017-0020-3].
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:SCSE Journal Articles

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