Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/89420
Full metadata record
DC FieldValueLanguage
dc.contributor.authorSiek, Literen
dc.contributor.authorPalaniappan, Arjun Ramaswamien
dc.date.accessioned2018-10-08T08:39:58Zen
dc.date.accessioned2019-12-06T17:25:06Z-
dc.date.available2018-10-08T08:39:58Zen
dc.date.available2019-12-06T17:25:06Z-
dc.date.issued2018en
dc.identifier.citationPalaniappan, A. R., & Siek, L. (2018). Wide-input dynamic range 1 MHz clock ultra-low supply flip-flop. Electronics Letters, 54(15), 938-939. doi:10.1049/el.2018.1134en
dc.identifier.issn0013-5194en
dc.identifier.urihttps://hdl.handle.net/10356/89420-
dc.description.abstractA new wide-input dynamic range flip-flop capable of operation at an ultra-low supply voltage of 0.16 V is presented. The proposed flip-flop named as capacitively boosted sense-amplifier flip-flop (CB-SAFF) utilises a capacitively boosted sense-amplifier master stage to sense the data signals and amplify them to a voltage higher than the supply and below the ground for driving the slave latch stage with improved strength. Using the same size of input/output transistors and load capacitance, the proposed CB-SAFF outperforms existing state-of-the-art sense-amplifier flip-flop designs at a low supply voltage operation from 0.16 to 0.6 V in terms of power delay product and clock to output propagation delay performance metrics. In addition, the proposed CB-SAFF can also sample low-swing data signals down to 0.2 V even at a 0.16 V supply voltage and 1 MHz clock frequency, thus making it highly suitable for applications that demand high speed and low power consumption such as for use in ultra-low voltage Internet of Things, wireless sensor nodes and smart motes.en
dc.description.sponsorshipEDB (Economic Devt. Board, S’pore)en
dc.format.extent2 p.en
dc.language.isoenen
dc.relation.ispartofseriesElectronics Lettersen
dc.rights© 2018 The Institution of Engineering and Technology. This paper was published in Electronics Letters and is made available as an electronic reprint (preprint) with permission of The Institution of Engineering and Technology. The published version is available at: [http://dx.doi.org/10.1049/el.2018.1134]. One print or electronic copy may be made for personal use only. Systematic or multiple reproduction, distribution to multiple locations via electronic or other means, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper is prohibited and is subject to penalties under law.en
dc.subjectDRNTU::Engineering::Electrical and electronic engineeringen
dc.subjectWide-input Dynamic Rangeen
dc.subjectUltra-low Supply Voltageen
dc.titleWide-input dynamic range 1 MHz clock ultra-low supply flip-flopen
dc.typeJournal Articleen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen
dc.contributor.researchVIRTUS, IC Design Centre of Excellenceen
dc.identifier.doi10.1049/el.2018.1134en
dc.description.versionPublished versionen
item.fulltextWith Fulltext-
item.grantfulltextopen-
Appears in Collections:EEE Journal Articles
Files in This Item:
File Description SizeFormat 
Wide-input dynamic range 1 MHz clock.pdf341.49 kBAdobe PDFThumbnail
View/Open

SCOPUSTM   
Citations 50

4
Updated on Mar 20, 2024

Web of ScienceTM
Citations 50

3
Updated on Oct 30, 2023

Page view(s) 50

432
Updated on Mar 28, 2024

Download(s) 50

121
Updated on Mar 28, 2024

Google ScholarTM

Check

Altmetric


Plumx

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.