Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/90103
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dc.contributor.authorLiu, Weichenen
dc.contributor.authorYi, Juanen
dc.contributor.authorLi, Mengquanen
dc.contributor.authorChen, Pengen
dc.contributor.authorYang, Leien
dc.date.accessioned2019-05-27T04:42:31Zen
dc.date.accessioned2019-12-06T17:40:43Z-
dc.date.available2019-05-27T04:42:31Zen
dc.date.available2019-12-06T17:40:43Z-
dc.date.issued2019en
dc.identifier.citationLiu, W., Yi, J., Li, M., Chen, P., & Yang, L. (2019). Energy-Efficient Application Mapping and Scheduling for Lifetime Guaranteed MPSoCs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 38(1), 1-14. doi:10.1109/TCAD.2018.2801242en
dc.identifier.issn0278-0070en
dc.identifier.urihttps://hdl.handle.net/10356/90103-
dc.identifier.urihttp://hdl.handle.net/10220/48375en
dc.description.abstractEnergy optimization is one of the most critical objectives for the synthesis of multiprocessor system-on-chip (MPSoC). Besides, to ensure a long processor lifetime and to maintain a safe chip temperature are also important for multiprocessor manufactures under deep submicrometer process technologies. This paper presents a mixed integer linear programming (MILP) model to determine the mapping and scheduling of real-time applications onto embedded MPSoC platforms, such that the total energy consumption is minimized with the lifetime reliability constraint and the temperature threshold constraint satisfied. We develop a lightweight temperature model that can be integrated in the MILP model to predict the chip temperature accurately and efficiently. By exploiting the dynamic voltage and frequency scaling capability of modern processors, processor voltage/frequency assignment is also considered in our MILP model. Extensive performance evaluations on synthetic and real-world applications demonstrate the effectiveness of the proposed approach. Our MILP model achieves an average reduction of 19.09% and 28.53% total energy in comparison with two state-of-the-art techniques on the basis of guaranteeing the safe chip temperature and system lifetime reliability.en
dc.format.extent14 p.en
dc.language.isoenen
dc.relation.ispartofseriesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systemsen
dc.rights© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/TCAD.2018.2801242.en
dc.subjectLifetime Reliabilityen
dc.subjectMultiprocessor System-on-chipen
dc.subjectDRNTU::Engineering::Computer science and engineeringen
dc.titleEnergy-efficient application mapping and scheduling for lifetime guaranteed MPSoCsen
dc.typeJournal Articleen
dc.contributor.schoolSchool of Computer Science and Engineeringen
dc.identifier.doihttp://dx.doi.org/10.1109/TCAD.2018.2801242en
dc.description.versionAccepted versionen
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