Please use this identifier to cite or link to this item:
Title: Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design
Authors: Ho, Weng-Geng
Chong, Kwen-Siong
Ne, Kyaw Zwa Lwin
Gwee, Bah-Hwee
Chang, Joseph Sylvester
Keywords: DRNTU::Engineering::Electrical and electronic engineering
Asynchronous Network-on-Chip (ANoC) Router
Energy Efficient
Issue Date: 2017
Source: Ho, W.-G., Chong, K.-S., Ne, K. Z. L., Gwee, B.-H., & Chang, J. S. (2018). Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 26(1), 196-200. doi:10.1109/TVLSI.2017.2750171
Series/Report no.: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Abstract: We propose a low area overhead and power-efficient asynchronous-logic quasi-delay-insensitive (QDI) sense-amplifier half-buffer (SAHB) approach with quad-rail (i.e., 1-of-4) data encoding. The proposed quad-rail SAHB approach is targeted for area- and energy-efficient asynchronous network-on-chip (ANoC) router designs. There are three main features in the proposed quad-rail SAHB approach. First, the quad-rail SAHB is designed to use four wires for selecting four ANoC router directions, hence reducing the number of transistors and area overhead. Second, the quad-rail SAHB switches only one out of four wires for 2-bit data propagation, hence reducing the number of transistor switchings and dynamic power dissipation. Third, the quad-rail SAHB abides by QDI rules, hence the designed ANoC router features high operational robustness toward process-voltage-temperature (PVT) variations. Based on the 65-nm CMOS process, we use the proposed quad-rail SAHB to implement and prototype an 18-bit ANoC router design. When benchmarked against the dual-rail counterpart, the proposed quad-rail SAHB ANoC router features 32% smaller area and dissipates 50% lower energy under the same excellent operational robustness toward PVT variations. When compared to the other reported ANoC routers, our proposed quad-rail SAHB ANoC router is one of the high operational robustness, smallest area, and most energy-efficient designs.
ISSN: 1063-8210
DOI: 10.1109/TVLSI.2017.2750171
Rights: © 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at:
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Journal Articles

Citations 20

Updated on Sep 7, 2020

Citations 50

Updated on Mar 4, 2021

Page view(s)

Updated on Jan 24, 2022

Download(s) 50

Updated on Jan 24, 2022

Google ScholarTM




Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.