Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/90466
Title: High-speed signal termination analysis using a co-simulation approach
Authors: Chang, Richard Weng Yew
See, Kye Yak
Soh, Wei-Shan
Oswal, Manish
Wang, Lin Biao
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing
Issue Date: 2009
Source: Chang, R. W. Y., See, K. Y., Soh, W. S., Oswal, M., & Wang, L. B. (2009). High-speed signal termination analysis using a co-simulation approach. In proceedings of the 12th International Symposium on Integrated Circuits: Singapore, (pp.623-626).
Abstract: Matched terminations of high-speed digital buses have long been the focus of high-speed board design. With increasing edge rates, proper bus termination has become even more crucial in today’s high-speed PCB interconnect design. Using a co-simulation approach, the 3D electromagnetic (EM) effects of high-speed interconnects and the circuit behavioral IBIS models of active devices are combined to investigate highspeed clock termination designs. Such an approach allows the high-frequency effects to be taken into account and therefore yields good accuracy for realistic high-speed board. A practical example is demonstrated based on the co-simulation approach.
URI: https://hdl.handle.net/10356/90466
http://hdl.handle.net/10220/6375
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Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Conference Papers

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