Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/90518
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dc.contributor.authorYu, Haoen
dc.contributor.authorHe, Leien
dc.contributor.authorChang, Frank Mau Chungen
dc.date.accessioned2010-04-20T03:38:35Zen
dc.date.accessioned2019-12-06T17:49:06Z-
dc.date.available2010-04-20T03:38:35Zen
dc.date.available2019-12-06T17:49:06Z-
dc.date.copyright2009en
dc.date.issued2009en
dc.identifier.citationYu, H., He, L., & Chang, M. C. (2009). Robust on-chip signaling by staggered and twisted bundle. IEEE Design and Test of Computers. 26(5), 92-104.en
dc.identifier.issn0740-7475en
dc.identifier.urihttps://hdl.handle.net/10356/90518-
dc.description.abstractExisting shield insertion for multiple signal nets can lead to a nonuniformly distributed, capacitive-coupling length and inductive return paths, introducing large delays and delay variation by crosstalk. This article discusses a twisted, staggered interconnect structure that reduces both inductive and capacitive crosstalk. The proposed design reduces delay by 25% and reduces delay variation by 25 compared to designs employing coplanar shields.en
dc.format.extent13 p.en
dc.language.isoenen
dc.relation.ispartofseriesIEEE design and test of computersen
dc.rights© 2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.en
dc.subjectDRNTU::Engineering::Electrical and electronic engineeringen
dc.titleRobust on-chip signaling by staggered and twisted bundleen
dc.typeJournal Articleen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen
dc.identifier.doi10.1109/MDT.2009.121en
dc.description.versionPublished versionen
dc.identifier.rims148331en
item.grantfulltextopen-
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