Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/90762
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dc.contributor.authorNg, Chi Yungen
dc.contributor.authorChen, Tupeien
dc.contributor.authorDing, Liangen
dc.contributor.authorFung, Stevenson Hon Yuenen
dc.date.accessioned2010-09-07T01:54:55Zen
dc.date.accessioned2019-12-06T17:53:32Z-
dc.date.available2010-09-07T01:54:55Zen
dc.date.available2019-12-06T17:53:32Z-
dc.date.copyright2006en
dc.date.issued2006en
dc.identifier.citationNg, C. Y., Chen, T. P., Ding, L., & Fung, S. H. Y. (2006). Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam. IEEE Electron Device Letters, 27(4), 231-233.en
dc.identifier.issn0741-3106en
dc.identifier.urihttps://hdl.handle.net/10356/90762-
dc.identifier.urihttp://hdl.handle.net/10220/6413en
dc.description.abstractDensely stacked silicon nanocrystal layers embedded in the gate oxide of MOSFETs are synthesized with Si ion implantation into an SiO2 layer at an implantation energy of 2 keV. In this letter, the memory characteristics of MOSFETs with 7-nm tunnel oxide and 20-nm control oxide at various temperatures have been investigated. A threshold voltage window of ∼ 0.5 V is achieved under write/erase (W/E) voltages of +12 V/-12 V for 1 ms. The devices exhibit good endurance up to 105 W/E cycles even at a high operation temperature of 150°C. They also have good retention characteristics with an extrapolated ten-year memory window of ∼ 0.3 V at 100°C.en
dc.format.extent3 p.en
dc.language.isoenen
dc.relation.ispartofseriesIEEE electron device lettersen
dc.rights© 2006 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.en
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Electronic circuitsen
dc.titleMemory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beamen
dc.typeJournal Articleen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen
dc.identifier.doihttp://dx.doi.org/10.1109/LED.2006.871183en
dc.description.versionPublished versionen
item.grantfulltextopen-
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