Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/91032
Title: Comprehensive analysis of serpentine line design
Authors: Soh, Wei-Shan
See, Kye Yak
Chang, Richard Weng Yew
Oswal, Manish
Wang, Lin Biao
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2009
Source: Soh, W. S., See, K. Y., Chang, R. W. Y., Oswal, M., & Wang, L. B. (2009). Comprehensive analysis of serpentine line design. In proceedings of the Asia Pacific Microwave Conference: Singapore, (pp.1285-1288).
Abstract: Serpentine lines have been widely used in digital circuits to provide the required timing delays. Based on a fullwave simulation tool, some critical parameters that affect the delay characteristic of a serpentine line are carefully studied and analyzed. With the comprehensive study and analysis, a set of practical and useful design guides are concluded for designing a serpentine line to meet the delay specification.
URI: https://hdl.handle.net/10356/91032
http://hdl.handle.net/10220/6393
DOI: 10.1109/APMC.2009.5384455
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Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Conference Papers

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