Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/91332
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dc.contributor.authorZhang, Yue Pingen
dc.date.accessioned2010-08-20T00:51:26Zen
dc.date.accessioned2019-12-06T18:03:48Z-
dc.date.available2010-08-20T00:51:26Zen
dc.date.available2019-12-06T18:03:48Z-
dc.date.copyright2004en
dc.date.issued2004en
dc.identifier.citationZhang, Y. P. (2004). Bit-error-rate performance of intra-chip wireless interconnect systems. IEEE Communications Letters. 8(1), 39-41.en
dc.identifier.issn1089-7798en
dc.identifier.urihttps://hdl.handle.net/10356/91332-
dc.description.abstractThis Letter evaluates the bit-error rate (BER) performance of a coherent binary phase-shift keying interconnect system operating on an intra-chip wireless channel at 15 GHz. Results show that the system performance degrades with the separation distance and the data rate. A high data rate at 2 Gb/s with a low BER 10 5 over the entire chip of size 20 20 mm can be achieved with the transmitted power of 10 dBm.en
dc.format.extent3 p.en
dc.language.isoenen
dc.relation.ispartofseriesIEEE communications lettersen
dc.rights© 2004 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.en
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Electronic systemsen
dc.titleBit-error-rate performance of intra-chip wireless interconnect systemsen
dc.typeJournal Articleen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen
dc.identifier.doi10.1109/LCOMM.2003.822514en
dc.description.versionPublished versionen
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