Please use this identifier to cite or link to this item:
Title: Physical layout design optimization of integrated spiral inductors for silicon-based RFIC applications
Authors: Sia, Choon Beng
Ong, Beng Hwee
Chan, Kwok Wai
Yeo, Kiat Seng
Ma, Jianguo
Do, Manh Anh
Keywords: DRNTU::Engineering::Electrical and electronic engineering
Issue Date: 2005
Source: Sia, C. B., Ong, B. H., Chan, K. W., Yeo, K. S., Ma, J. G., & Do, M. A. (2005). Physical layout design optimization of integrated spiral inductors for silicon-based RFIC applications. IEEE Transactions on Electron Devices, 52(12), 2559-2567.
Series/Report no.: IEEE transactions on electron devices
Abstract: A new test structure layout technique and design methodology are used to investigate quantitatively how geometrical layout parameters such as core diameter, conductor spacing, and width would affect the performance of spiral inductors. For the 0.18-µm RFCMOS technology, experimental results in this paper reveal that inductors’ core diameters must be adequately large, more than 100 µm, to ensure high quality factor characteristics and their conductor spacing should be minimal to obtain larger per unit area inductance value. A novel design methodology which optimizes the conductor width of inductors allows alignment of their peak quality factor to the circuit’s operating frequency, enhancing the gain, input/output matching characteristics and noise figure of a giga-hertz amplifier.
ISSN: 0018-9383
DOI: 10.1109/TED.2005.859638
Rights: © 2005 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Journal Articles

Files in This Item:
File Description SizeFormat 
Physical layout design optimization of integrated spiral inductors for silicon-based RFIC applications.pdfPublished version1.55 MBAdobe PDFThumbnail

Citations 10

Updated on Sep 2, 2020

Citations 10

Updated on Mar 6, 2021

Page view(s) 10

Updated on Jan 19, 2022

Download(s) 5

Updated on Jan 19, 2022

Google ScholarTM




Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.