Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/92451
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dc.contributor.authorSunny, Sharmaen
dc.contributor.authorChen, Yongen
dc.contributor.authorBoon, Chirn Chyeen
dc.date.accessioned2019-09-11T08:49:38Zen
dc.date.accessioned2019-12-06T18:23:31Z-
dc.date.available2019-09-11T08:49:38Zen
dc.date.available2019-12-06T18:23:31Z-
dc.date.issued2018en
dc.identifier.citationSunny, S., Chen, Y., & Boon, C. C. (2018). A 4.06 mW 10-bit 150 MS/s SAR ADC with 1.5-bit/cycle operation for medical imaging applications. IEEE Sensors Journal, 18(11), 4553-4560. doi:10.1109/JSEN.2018.2825400en
dc.identifier.issn1530-437Xen
dc.identifier.urihttps://hdl.handle.net/10356/92451-
dc.description.abstractThis paper reports a 10-bit 150 MS/s successive approximation register analog-to-digital converter with binary-scaled redundancy-facilitated error correction technique. The proposed 1.5-bit/cycle technique with built-in capacitive digital-to-analog converter (CDAC) redundancy, corrects multiple erroneous decisions in a total of nine conversion cycles. The proposed binary-scaled redundancy provides a 12.5% error tolerance range for the incomplete CDAC voltage settling. The digital error-correction logic circuit presented uses a bit-overlap-and-add technique. The prototype chip was fabricated in 65-nm CMOS technology and occupies chip area of 0.038 mm 2 . It consumes 4.06 mW from a 1.2 V supply, achieving the Nyquist signal-to-noise-and-distortion ratio of 57.81 dB and the effective number of bits of 9.31-bit at an operating frequency of 150 MS/s, corresponding to the figure-of-merit of 42.6 fJ/ conversion-step.en
dc.format.extent8 p.en
dc.language.isoenen
dc.relation.ispartofseriesIEEE Sensors Journalen
dc.rights© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/JSEN.2018.2825400.en
dc.subject1.5-bit/cycleen
dc.subjectADCen
dc.subjectEngineering::Electrical and electronic engineeringen
dc.titleA 4.06 mW 10-bit 150 MS/s SAR ADC with 1.5-bit/cycle operation for medical imaging applicationsen
dc.typeJournal Articleen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen
dc.identifier.doi10.1109/JSEN.2018.2825400en
dc.description.versionAccepted versionen
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