Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/92986
Title: Fully symmetrical monolithic transformer (true 1:1) for silicon RFIC
Authors: Lim, Chee Chong
Yeo, Kiat Seng
Chew, Kok Wai Johnny
Cabuk, Alper
Gu, Jiang Min
Lim, Suh Fei
Boon, Chirn Chye
Do, Manh Anh
Keywords: DRNTU::Engineering::Electrical and electronic engineering
Issue Date: 2008
Source: Lim, C. C., Yeo, K. S., Chew, K. W. J., Cabuk, A., Gu, J. M., Lim, S. F., Boon, C. C., Do, M. A. (2008) Fully Symmetrical Monolithic Transformer (True 1 : 1) for Silicon RFIC. IEEE Transactions on Microwave Theory and Techniques. 56(10), 2301-2311.
Series/Report no.: IEEE transactions on microwave theory and techniques
Abstract: A novel on-chip transformer configuration that gives an identical inductor pair, a higher individual coil self-resonant frequency (SRF), and excellent area efficiency are presented. This technique involves the unique way of inter-crossing the transformer’s primary and secondary coils using multiple metallization layers. Truly symmetrical transformer configuration (100%) is demonstrated using minimum die size. Thus, a true 1 : 1 transformer has been realized on silicon. The effects of the parasitic within the transformer are represented by an equivalent-circuit model. Accurate semiempirical expressions describing the circuit components are provided based on the various layout parameters. Of all the transformer structures presented, the two designs occupying the minimum silicon area by a factor of > 2x have been selected for performance evaluation of the SRF, coupling coefficient, input impedance, quality factor, and inductance. The transmission line transformer mode has also been studied to examine the designs’ performance in the differential mode. The second proposed design reported in this paper, with enhancements in S21 and k performance, is created by adding a unique routing technique onto the first proposed structure. The method presented is fully compatible with the standard foundry CMOS processes. The silicon data reported in this study are based on Chartered Semiconductor Manufacturing’s 0.13-µm RF CMOS technology node.
URI: https://hdl.handle.net/10356/92986
http://hdl.handle.net/10220/6261
ISSN: 0018-9480
DOI: 10.1109/TMTT.2008.2003531
Rights: © 2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Journal Articles

Files in This Item:
File Description SizeFormat 
Fully symmetrical monolithic transformer (true 1-1) for silicon RFIC.pdf1.74 MBAdobe PDFThumbnail
View/Open

SCOPUSTM   
Citations 10

30
Updated on Mar 9, 2021

Web of ScienceTM
Citations 10

23
Updated on Mar 9, 2021

Page view(s) 1

1,325
Updated on Sep 26, 2022

Download(s) 1

889
Updated on Sep 26, 2022

Google ScholarTM

Check

Altmetric


Plumx

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.