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Title: Design and analysis of double-gate MOSFETs for ultra-low power radio frequency identification (RFID) : device and circuit co-design
Authors: Vaddi, Ramesh.
Agarwal, Rajendra P.
Dasgupta, Sudeb.
Kim, Tony Tae-Hyoung
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2011
Source: Vaddi, R., Agarwal, R. P., Dasgupta, S., & Kim, T. T. (2011). Design and Analysis of Double-Gate MOSFETs for Ultra-Low Power Radio Frequency Identification (RFID): Device and Circuit Co-Design. Journal of Low Power Electronics and Applications, 1(2), 277-302.
Series/Report no.: Journal of low power electronics and applications
Abstract: Recently, double-gate MOSFETs (DGMOSFETs) have been shown to be more otpimal for ultra-low power circuit design due to the improved subthreshold slope and the reduced leakage current compared to bulk CMOS. However, DGMOSFETs for subthreshold circuit design have not been much explored in comparison to those for string inversion-based design. In this paper, various configurations of DGMOSFETs, such as tied/independent gates and symmetric/asymmetric gate oxide thicknes are explored for ultra-low power and high efficient radio frequency identification (RFID) design. Comparison of bulk CMOS with DGMOSFETs has been conducted in ultra-low power subthreshold digital logic design and rectifier desgin, emphasizing the scope of the nano-scale DGMOSFET technology for future ultra-low power systems. The DGMOSFET-based subthreshold logic improves energy efficiency by more than 40% compared to the bulk CMOS-based logic at 32nm. Among the various DGMOSFET configurations for RFID rectifiers, symmetric tied-gate DGMOSFET has the best power conversion efficiency and the lowest power consumption.
ISSN: 2079-9268(electronic)
DOI: 10.3390/jlpea1020277
Rights: © 2011 by the authors; licensee MDPI, Basel, Switzerland.
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Journal Articles

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