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https://hdl.handle.net/10356/96072
Title: | A model for understanding electromigration-induced void evolution in dual-inlaid Cu interconnect structures | Authors: | Helonde, J. B. Mhaisalkar, Subodh Gautam Pete, D. J. Vairagar, A. V. |
Keywords: | DRNTU::Engineering::Materials::Electronic packaging materials | Issue Date: | 2012 | Source: | Pete, D. J., Helonde, J. B., Vairagar, A. V., & Mhaisalkar, S. G. (2012). A model for understanding electromigration-induced void evolution in dual-inlaid Cu interconnect structures. Journal of electronic materials, 41(3), 568-572. | Series/Report no.: | Journal of electronic materials | Abstract: | Electromigration-induced void evolution in various dual-inlaid copper (Cu) interconnect structures was simulated by applying a phenomenological model assisted by Monte Carlo-based simulations, considering the redistribution of heterogeneously nucleated voids and/or pre-existing vacancy clusters at the Cu/dielectric cap interface during electromigration. The results indicate that this model can qualitatively explain the electromigration-induced void evolution observed during experimental in situ secondary-electron microscopy (SEM) investigations as well as in various other reported studies. The electromigration mechanism in Cu interconnect structures and differences in the peculiar electromigration-induced void evolution in various dual-inlaid Cu interconnect structures can be clearly understood based on this model. These findings warrant reinvestigation of technologically important electromigration mechanisms by developing rigorous models based on similar concepts. | URI: | https://hdl.handle.net/10356/96072 http://hdl.handle.net/10220/18150 |
DOI: | 10.1007/s11664-011-1855-y | Schools: | School of Materials Science & Engineering | Fulltext Permission: | none | Fulltext Availability: | No Fulltext |
Appears in Collections: | MSE Journal Articles |
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