Effect of direct current stressing to Cu–Cu bond interface imperfection for three dimensional integrated circuits

Abstract

The ability to be used as both a glue layer and the interconnection line has put Cu metal interconnection as the ultimate goal for 3D-IC. However, the inherent properties of Cu–Cu bond interface that are not always perfect have raised some concerns. This work investigates the evolution of the Cu–Cu bond interface that had been subjected to prolonged electrical current stress. Interface evolutions were characterized by a combination of electrical current stressing and bond interface cross-sectional analysis. While interface improvement was observed in terms of interface void reduction after current stressing, early failures to the interconnection line adjacent to the bond interface were observed. Electromigration had driven void migration from the large bond interface area to the much smaller adjoining interconnect line. This potentially has a significant impact on the future of 3D-IC technology that utilizes Cu–Cu bonding. However, this problem can be mitigated by inserting a barrier layer in between the bond interface and the interconnect line to prevent the migration of the voids into the interconnect line