Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/99561
Title: TROJANUS : An ultra-lightweight side-channel leakage generator for FPGAs
Authors: Kutzner, Sebastian
Poschmann, Axel
Stöttinger, Marc
Keywords: DRNTU::Science::Physics
Issue Date: 2013
Source: Kutzner, S., Poschmann, A., & Stöttinger, M. (2013). TROJANUS: An ultra-lightweight side-channel leakage generator for FPGAs. 2013 International Conference on Field-Programmable Technology (FPT), 160 - 167.
Abstract: In this article we present a new side-channel building block for FPGAs, which, akin to the old Roman god of Janus, has two contradictory faces: as a watermarking tool, it allows to uniquely identify IP cores by adding a single slice to the design; as a Trojan Side-Channel (TSC) it can potentially leak an entire encryption key within only one trace and without the knowledge of either the plaintext or the ciphertext. We practically verify TROJANUS' feasibility by embedding it as a TSC into a lightweight FPGA implementation of PRESENT. Besides, we investigate the leakage behavior of FPGAs in more detail and present a new pre-processing technique, which can potentially increase the correlation coefficient of DPA attacks.
URI: https://hdl.handle.net/10356/99561
http://hdl.handle.net/10220/18866
DOI: 10.1109/FPT.2013.6718347
Rights: © 2013 IEEE. This is the author created version of a work that has been peer reviewed and accepted for publication by 2013 International Conference on Field-Programmable Technology (FPT), IEEE. It incorporates referee’s comments but changes resulting from the publishing process, such as copyediting, structural formatting, may not be reflected in this document. The published version is available at: [DOI:http://dx.doi.org/10.1109/FPT.2013.6718347 ].
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:SPMS Conference Papers

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