High energy efficient ultra-low voltage SRAM design : device, circuit, and architecture

Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/99664

Title:	High energy efficient ultra-low voltage SRAM design : device, circuit, and architecture
Authors:	Kim, Tony Tae-Hyoung Wang, Bo Do, Anh Tuan
Keywords:	DRNTU::Engineering::Electrical and electronic engineering
Issue Date:	2012
Source:	Kim, T. T., Wang, B., & Do, A. T. (2012). High energy efficient ultra-low voltage SRAM design: Device, circuit, and architecture. 2012 International SoC Design Conference (ISOCC 2012).
Conference:	International SoC Design Conference (2012 : Jeju, Korea)
Abstract:	High energy efficient ultra-low voltage SRAMs play a key role in many emerging ultra-low power applications. However, design of SRAMs for reliable ultra-low voltage operation is challenging due to various problems. In this paper, we explore various ultra-low voltage SRAM design techniques for improving energy efficiency. Effect of MTCMOS on energy efficiency improvement, circuit techniques for ultra-low voltage operation, and architectural considerations will be presented.
URI:	https://hdl.handle.net/10356/99664 http://hdl.handle.net/10220/13601
DOI:	10.1109/ISOCC.2012.6407117
Schools:	School of Electrical and Electronic Engineering
Fulltext Permission:	none
Fulltext Availability:	No Fulltext
Appears in Collections:	EEE Conference Papers

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