Now showing items 1-9 of 9

    • Analysis and optimization of a deeply pipelined FPGA soft processor 

      Cheah, Hui Yan; Fahmy, Suhaib A.; Kapre, Nachiket (2014)
      FPGA soft processors have been shown to achieve high frequency when designed around the specific capabilities of heterogenous resources on modern FPGAs. However, such performance comes at a cost of deep pipelines, which ...
    • Architecture for real-time nonparametric probability density function estimation 

      Fahmy, Suhaib A.; Mohan, A. R. (2013)
      Adaptive systems are increasing in importance across a range of application domains. They rely on the ability to respond to environmental conditions, and hence real-time monitoring of statistics is a key enabler for such ...
    • An End-to-End Multi-Standard OFDM Transceiver Architecture Using FPGA Partial Reconfiguration 

      Pham, Thinh Hung; Fahmy, Suhaib A.; McLoughlin, Ian Vince (2017)
      Cognitive radios that are able to operate across multiple standards depending on environmental conditions and spectral requirements are becoming more important as the demand for higher bandwidth and efficient spectrum use ...
    • Evaluating the efficiency of DSP Block synthesis inference from flow graphs 

      Ronak, Bajaj..; Fahmy, Suhaib A. (2012)
      The embedded DSP Blocks in FPGAs have become significantly more capable in recent generations of devices. While vendor synthesis tools can infer the use of these resources, the efficiency of this inference is not guaranteed. ...
    • A high speed open source controller for FPGA Partial Reconfiguration 

      Vipin, Kizheppatt.; Fahmy, Suhaib A. (2012)
      Partial Reconfiguration (PR) is an advanced technique, which improves the flexibility of FPGAs by allowing portions of a design to be reconfigured at runtime by overwriting parts of the configuration memory. PR is an ...
    • iDEA : a DSP block based FPGA soft processor 

      Cheah, Hui Yan; Fahmy, Suhaib A.; Maskell, Douglas L. (2012)
      This paper presents a very lean DSP Extension Architecture (iDEA) soft processor for Field Programmable Gate Arrays (FPGAs). iDEA has been built to be as lightweight as possible, utilising the run-time flexibility of the ...
    • A lean FPGA soft processor built using a DSP block 

      Cheah, Hui Yan; Fahmy, Suhaib A.; Maskell, Douglas L.; Kulkarni, Chidamber (2012)
      As Field Programmable Gate Arrays (FPGAs) have advanced, the capabilities and variety of embedded resources have increased. In the last decade, signal processing has become one of the main driving applications for FPGA ...
    • On Data Forwarding in Deeply Pipelined Soft Processors 

      Cheah, Hui Yan; Fahmy, Suhaib A.; Kapre, Nachiket (2015)
      We can design high-frequency soft-processors on FPGAs that exploit deep pipelining of DSP primitives, supported by selective data forwarding, to deliver up to 25% performance improvements across a range of benchmarks. ...
    • System-level FPGA device driver with high-level synthesis support 

      Vipin, Kizheppatt; Shreejith, Shanker; Gunasekera, Dulitha; Fahmy, Suhaib A.; Kapre, Nachiket (2013)
      We can exploit the standardization of communication abstractions provided by modern high-level synthesis tools like Vivado HLS, Bluespec and SCORE to provide stable system interfaces between the host and PCIe-based FPGA ...