Now showing items 1-3 of 3
A CMOS Low-power Temperature-robust RSSI using Weak-inversion Limiting Amplifiers
This paper presents a low-power CMOS receiving signal strength indicator (RSSI). The main architecture of the circuit adopts a six-stage limiting amplifier (LA) in a logarithmic-linear form, which shows a good performance ...
Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits
Real time spike detection is the first critical step to develop spike-sorting for integrated brain circuits interface applications. Nonlinear Energy Operator (NEO) and absolute thresholding have been widely used as the ...
A 220-285 GHz SPDT Switch in 65-nm CMOS Using Switchable Resonator Concept
The paper reports a SPDT switch operating from 220 to 285 GHz in 65-nm bulk CMOS. The switchable resonator concept by using three coupled-lines topology is proposed and adopted in the switch design. Equivalent circuit ...