Now showing items 1-3 of 3
Physical layout design optimization of integrated spiral inductors for silicon-based RFIC applications
A new test structure layout technique and design methodology are used to investigate quantitatively how geometrical layout parameters such as core diameter, conductor spacing, and width would affect the performance of ...
Metallization proximity studies for copper spiral inductors on silicon
The impacts of metallization proximity for copper spiral inductors on silicon have been investigated in this paper. Performance of the spiral inductor versus area consumption tradeoff with respect to its core diameter ...
Accurate and scalable RF interconnect model for silicon-based RFIC applications
A new figure of merit, intrinsic factor for interconnects, is proposed to provide insights as to how back-end metallization influences the performance of radio frequency integrated circuits. An accurate and scalable ...