Now showing items 1-3 of 3
Physical layout design optimization of integrated spiral inductors for silicon-based RFIC applications
A new test structure layout technique and design methodology are used to investigate quantitatively how geometrical layout parameters such as core diameter, conductor spacing, and width would affect the performance of ...
Accurate and scalable RF interconnect model for silicon-based RFIC applications
A new figure of merit, intrinsic factor for interconnects, is proposed to provide insights as to how back-end metallization influences the performance of radio frequency integrated circuits. An accurate and scalable ...
Modeling and layout optimization of differential inductors for Silicon-based RFIC applications
A scalable RF differential inductor model has been developed, enabling device performance versus layout size tradeoffs and optimization as well as accurate circuit predictions. Comparing inductors with identical inductance ...