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Design and analysis of ultra low power true single phase clock CMOS 2/3 prescaler
In this paper the power consumption and operating frequency of true single phase clock (TSPC) and extended true single phase clock (E-TSPC) frequency prescalers are investigated. Based on this study a ...
Design of a hysteresis frequency lock detector for dual-loops clock and data recovery circuit
In dual-loops clock and data recovery (CDR) circuit design, lock detector is crucial in controlling the switching within CDR loop. The setting of the frequency accuracy of lock detector is a tough task as large ppm ...
A 60GHz VCO with 25.8% tuning range by switching return-path in 65nm CMOS
This paper presents a novel inductive tuning method for 60GHz voltage controlled oscillator (VCO) design. A new inductor-loaded transformer is proposed by configuring different current return-paths in the secondary coil ...