Now showing items 1-6 of 6
Body-bootstrapped-buffer circuit for CMOS static power reduction
In this paper, we present a new CMOS circuit design for increasing the threshold voltages (VT) of MOSFETS to reduce power consumption. Using a single voltage source VDD, the proposed circuit generates both the high positive ...
Design and sensitivity analysis of a new current-mode sense amplifier for low-power SRAM
A new current-mode sense amplifier is presented. It extensively utilizes the cross-coupled inverters for both local and global sensing stages, hence achieving ultra low-power and ultra ...
A full current-mode sense amplifier for low-power SRAM applications
A full current-mode sense amplifier is presented. It extensively utilizes the cross-coupled inverters for both local and global sensing stages, hence achieving ultra low-power and ultra ...
Design and performance evaluation of a low-power data-line SRAM sense amplifier
The SRAM which functions as the cache for system-on-chip is vital in the electronic industry. The heavy bitand data-line capacitances are the major road blocks ...
Design of low-power high-speed truncation-error-tolerant adder and its application in digital signal processing
In modern VLSI technology, the occurrence of all kinds of ...
Hybrid-mode SRAM sense amplifiers : new approach on transistor sizing
A novel high-speed sense amplifier for ultra-low-voltage SRAM applications is presented. It introduces a completely different way of sizing the aspect ratio of the transistors on the data-path, hence realizing a current-voltage ...