Now showing items 11-12 of 12
Broad-band design techniques for transimpedance amplifiers
In this paper, a novel bandwidth enhancement technique based on the combination of capacitive degeneration, broad-band matching network, and the regulated cascode (RGC) input stage is proposed and analyzed, which turns the ...
Design of a hysteresis frequency lock detector for dual-loops clock and data recovery circuit
In dual-loops clock and data recovery (CDR) circuit design, lock detector is crucial in controlling the switching within CDR loop. The setting of the frequency accuracy of lock detector is a tough task as large ppm ...